Job Opportunities

San Jose Jobs

For information, contact hr@paradetech.com

Current Job Openings:

Position: Director/ Program Manager – Automotive Programs

Location: San Jose, CA

 Responsibilities:

  • Develop, set up and maintain TS16949 requirements for all internal and external sites engaged in Automotive products and related operations
  • Drive new automotive qualification schedules and activities
  • Assists all departments with development of Control Plans, Work Instructions in accordance with their PFMEAs, Process Flows, Company quality system’s procedures, customer requirements and automotive industry standards
  • Supports supplier quality system audits according to ISO/TS16949 requirements
  • Establish and oversee PPAP process for internal organizations and subcontract suppliers
  • Develop safety plans to ensure compliance with ISO26262
  • With Sales, negotiate with customer specific automotive quality requirements
  • Serve as Focal Point for major customer quality issues
  • Partner with Customer Quality and Operations departments to solve quality problems while maintaining product development and manufacturing efficiencies, meeting competitive business deadlines, and increasing customer satisfaction
  • Ensure effective containment of quality issues identified by customers.  Drive root cause analysis and permanent corrective actions

Required Experience:

  • 15+ years industrial experience in Quality Engineering/ Quality Management within the semiconductor industry
  • ISO/ TS16949 and ISO 26262 experience driving compliance and implementation of requirements
  • Automotive Industry experience in an electronics manufacturing environment
  • Hands on experience apply VDA and other automotive specific standards (e.g. IATF, ISO, SAE, JEDEC, ZVEI, etc.)
  • Experience as leader in corporate cross functional teams
  • Lean and Six Sigma experience a plus
  • Demonstrated ability to develop strong relationships with customers and internal, cross functional organizations

Qualifications:

  • Minimum of Bachelor’s degree in Engineering or related field, Master’s degree preferred
  • Strong written and verbal skills as well as organizational and program management capabilities
  • Excellent skills in Word, Excel and PowerPoint
  • Reading and speaking Chinese Mandarin are a plus
  • Ability to travel domestic and internationally

Position: Senior Signal Integrity (SI) Engineer

Location: San Jose, CA

Responsibilities:

  • Perform analysis, design, and understand trade-offs in the design of interconnect solutions ranging from chip-to-chip, board-to-board, backplane and chassis-to-chassis interconnect
  • Perform channel margin analysis to provide design trade-offs among package, board, cable and connector
  • Develop SerDes channel simulation models and correlate to test structures; Correlate system simulation models with measurements
  • Perform high speed channel timing analysis, work with board engineers and layout designers to implement all SI rules, develop layout/SI checklists
  • Define specifications and system design requirements such as packaging and PCB routing, IC-PKG-BRD decoupling requirements, channel simulations and jitter sensitivity analysis.

Qualifications:

  • MS/Ph.D. in EE or Physics
  • Deep understanding of electromagnetics and strong EE/RF fundamentals
  • Good understanding of high speed SerDes architecture ranging from 1Gbps to 56Gbps
  • Proficient with AMI serdes models, ADS, HSPICE, Allegro, Sigrity, Ansys EM tools
  • Proficient with lab equipment such as oscilloscopes, Vector Network Analyzers (VNA), Time Domain Reflectometer (TDR), Spectrum Analyzers, phase noise analyzers; Good lab debug skills a plus

Position: Senior Digital/Logic Design Engineer

Location: San Jose, CA

  • 5+ years experience with MS in EE or CS
  • Hands on silicon design and bring up experiences
  • Experiences with data communication protocols such as PCI Express, SuperSpeed USB, SATA, etc.
  • Experiences in mixed signal design with good understanding of analog circuit design
  • Design experience with PCIe 3.0 and 4.0 is a plus

Position: Senior High Speed Analog Design Engineer

Location: San Jose, CA

  • 5+ years experience with MS in EE or CS
  • Hands on experiences on the design and validation of wireline high speed silicon
  • Experiences with strong design capability for the 10Gbps+ wireline data transfer
  • Experience with USB 3.1, or PCIe 3.0 and PCIe 4.0 is a plus

Position: Senior Paralegal

Location: San Jose, CA

Responsibilities:

  • Develop, set up and maintain internal legal filing system, including contract administration
  • Assist General Counsel in reviewing non-disclosure agreements
  • Administer contract review approval process
  • Assist General Counsel in preparing, implementing and updating company policies and procedures for global offices, including corporate governance policies and ensure proper posting to company website
  • Monitor changes to laws and rules changes in various jurisdictions and report to General Counsel
  • Work with outside counsel on various matters
  • Coordinate matters with internal cross functional employees and outside third parties
  • Assist General Counsel on employment and HR related matters

Required Experience:

  • 10+ year of legal assistant experience (5+ year as in-house paralegal and 5+ years in law firms preferred)
  • Demonstrated experience in handling corporate, contract review process, policies and procedures, employment and HR related matters
  • Experienced in working cross-functionally and collaborate with outside law firms

Qualifications:

  • Bachelor degree, AA degree with demonstrated relevant experience, or equivalent in experience
  • Strong interpersonal skill; a self-starter with solid problem-solving, project management and organizational skills
  • Excellent skills in Word, Excel and PowerPoint
  • Experience in using and implementing legal database
  • Reading and speaking Chinese Mandarin are a plus

Shanghai Jobs

For information, contact hr.sh@paradetech.com

Accountant

Analog Design Engineer

FAE Engineer

Layout Designer Engineer

Logic Design Engineer

Marketing Engineer

Product Engineer

Software Engineer

System Validation Engineer

System Engineer

Test Engineer

Sr. Analog Design Engineer

Sr. CAD Engineer

Sr. Layout Engineer

Sr. Logic Design Engineer

Sr. Product Engineer

Sr. Staff Analog Design Engineer

Sr. Staff Layout Engineer

Sr. Staff Logic Design Engineer


Lynnwood Washington Jobs

For information, contact hr@paradetech.com

Position: Senior FIRMWARE Design Engineer

Location: Lynnwood, WA

DESCRIPTION OF POSITION –

Firmware product development in support of integrated touch and display controller devices.
Development of firmware, tools, and simulations in support of new and existing discrete touch and display integrated touch solutions.
Work with systems engineering and IC design engineering groups to sustaining existing products and support development of new products.
Successful candidate must have the ability to communicate with engineers of varying backgrounds: software, digital hardware, IC design and applications.
Some of the job responsibilities will include system level simulations and analysis to solve system level problems during the development and production.
Application support for key customer touch screen solutions.
Ability to work independently and to drive issues to closure.
Experience of interfacing to either internal or external customers.

QUALIFICATIONS –

  • Experience with embedded software debugging.
  • Knowledgeable of analog and digital circuits and MCU based application design
  • Solid ‘C’ and Python or Matlab, with some Assembly language familiarity
  • Robust communication protocol development.
  • Experience using I2C and SPI interfaces
  • Control System, Software Radio, or DSP background desired
  • Executing firmware validation plans on FPGA test platform.
  • 3-5yrs+ embedded microcontroller background, prefer ARM Cortex device background.
  • Master Degree or equivalent experience in EE, CE, Physics, Mathematics
  • Some travel required
  • Fluent in English (both written and oral)
  • Projected capacitance technical experience is a plus

Nanjing Jobs

For information, contact hr.sh@paradetech.com

Analog Design Engineer

Jr. Accountant and Office Admin Support

Layout Designer Engineer

Logic Design Engineer

Product Engineer

Section Manager, Logic Design

Software Engineer

Sr. Analog Design Engineer

Sr. Layout Engineer

Sr. Product Engineer

Sr. Software Engineer

Sr. System Engineer

Sr. System Validation Engineer

System Engineer

System Validation Engineer


Taipei Jobs

For information, contact hr@paradetech.com

Analog Design Engineer

Cost Manager

FAE Engineer

Jr. Accountant and Office Admin Support

Operations Manager

PC Control Manager

Production Control Engineer

Sr. Sales Manager


Cork Ireland Jobs

For information, contact hr@paradetech.com

Position: Analog Design Engineer

Company: Parade Technologies Ireland, Ltd.
Working Location: Cork, Ireland

Responsibilities

  • You will be part of the development team for specification and implementation of analog designs using the latest IC CAD tools and methodologies.
  • You will work in close conjunction with the digital and verification teams to develop a complete, world class mixed signal design environment.

Requirements

  • 3+ years experience in Analog Design
  • Excellent understanding of Analog Design fundamentals
  • Experience with Cadence Schematic Entry and Spice simulation is essential
  • Good level of knowledge of Analog layout techniques
  • Matlab modelling capability desirable
  • Working knowledge of Unix, Excel also required
  • It is essential that the candidates will have experience of planning, design, layout, tape-out and characterization of their analog circuits