JobOpportunities

Current Job Openings

If you’re interested or would like more information, please send your resume to hr@paradetech.com.

San Jose, California

Cost Accounting Manager / Senior Cost Accountant

Annual base salary: $120,000 – $160,000

We are seeking an experienced Cost Accounting Manager / Senior Cost Accountant to lead and support the Company’s cost accounting function within a fabless semiconductor environment. This role is responsible for ensuring the accuracy of product costing, inventory valuation, variance analysis, inventory accounting, and manufacturing-related financial reporting.

Key Responsibilities

  • Own and maintain standard costing methodologies, cost roll-ups, and product cost structures.
  • Manage inventory accounting, inventory valuation, excess and obsolete inventory reserves, write-offs, and related financial reporting.
  • Perform detailed cost and variance analyses, including material, manufacturing, inventory, yield, and purchase price variances.
  • Analyze manufacturing costs and inventory-related transactions to ensure accurate financial reporting.
  • Lead or support monthly, quarterly, and annual close activities related to inventory, cost accounting, and manufacturing operations.
  • Prepare and review manufacturing-related journal entries, reconciliations, accruals, and supporting schedules.
  • Support external and internal audits by providing schedules, analyses, and accounting support.
  • Prepare ad hoc analyses to support management decision-making.
  • Ensure compliance with IFRS / GAAP and Company accounting policies.
  • Partner with Supply Chain, Procurement, Operations, and Accounting teams to monitor and analyze product costs throughout the semiconductor supply chain.
  • Monitor inventory transactions and manufacturing-related costs to ensure financial accuracy and transparency.

Required Qualifications

  • Bachelor’s degree in Accounting, Finance, or a related field.
  • CPA or Master’s degree preferred.
  • 6+ years of progressive cost accounting experience with responsibility for inventory accounting, standard costing, variance analysis, and manufacturing-related financial reporting.
  • Direct experience in the semiconductor industry, with experience in a fabless semiconductor company strongly preferred.
  • Strong understanding of semiconductor manufacturing processes, outsourced foundry operations, assembly and test processes, and global supply chain cost structures.
  • Advanced knowledge of cost accounting principles, inventory accounting, and IFRS / GAAP financial reporting requirements.
  • Experience supporting monthly, quarterly, and annual financial close processes.
  • Experience with Microsoft Dynamics 365 is strongly preferred.
  • Advanced Excel and financial analysis skills.
  • Demonstrated ability to work independently and take ownership of complex accounting and reporting processes.
  • Ability to work effectively across Accounting, Supply Chain, Procurement, and Operations organizations.
  • Bilingual in English and Mandarin Chinese is a plus.

San Jose, CA or Beaverton, Oregon

Quality and Reliability Assurance Manager, Operations

Annual base salary: $150,000 – $190,000

We’re seeking an experienced Quality and Reliability Assurance Manager to own product reliability and quality from development through production, ensuring our products meet industry standards, customer expectations, and long-term performance requirements.

Key Responsibilities

  • Generate reliability metrics, statistical modeling, and lifetime estimations for new products.
  • Prepare specialized reliability reports tailored to meet the unique requirements of specific customers.
  • Lead product qualification efforts, including AEC-Q100, ISO 9001, and customer-specific requirements.
  • Coordinate engineering builds, establishing initial templates for new engineering builds (NPI).
  • Interface with subcontractors and vendors to ensure compliance with reliability and quality standards.
  • Manage customer QA requests.
  • Host weekly MRB review meeting.

Required Qualifications

  • Master’s degree or above in Electrical Engineering, Physics, or semiconductor-related field.
  • Familiarity with IC reliability modeling for various tests, like HTOL, HCI, NBTI, PBTI, EM, etc.
  • Strong understanding of reliability testing methodologies and statistical analysis.
  • Familiarity with industry standards such as AEC-Q100, JEDEC JESD47, ISO 9001.
  • Excellent communication skills to effectively convey complex technical concepts.
  • Experienced with FA tools, knowledge of reliability software.
  • Familiar with automotive reliability requirements.
  • Bilingual in English and Mandarin Chinese is strongly preferred.

Beaverton, Oregon

Staff ASIC Design Engineer

Annual base salary: $150,000 – $180,000

Responsibilities:

  • SOC subsystem architect including documentation of micro-architecture
  • Lead design team for major subsystems of large SOCs

Qualifications:

  • BS/MS degree with 10+ years of relevant work experience
  • Expert understanding of digital design and verification practices
  • Ability to write RTL based on a specification and simulate vectors to verify RTL
  • Experience using System Verilog (SV) and at least two prior RTL designs
  • Extensive knowledge of PCIe, USB3, or Power Delivery

Required Experience:

  • Demonstrate an expert knowledge of System Verilog (SV) or similar verification language
  • Demonstrate an expert knowledge of Verilog for chip design and verification
  • Understanding the ASIC flow from MAS to silicon including RTL design, verification, synthesis, timing constraints, GLS, FPGA prototyping, and first silicon bring up and debug
  • Experience with high-speed serial protocols (USB3, PCIe, Ethernet, etc.)
  • Experience with creating module level test benches and BFMs

Sr. ASIC Design Engineer

Annual base salary: $120,000 – $150,000

Responsibilities:

  • Member of design team for large SOCs

Qualifications:

  • BS/MS degree with 5+ years of relevant work experience
  • Good understanding of digital design and verification practices
  • Ability to write RTL based on a specification and simulate vectors to verify RTL
  • Experience using System Verilog (SV) and at least one prior RTL designs
  • Familiarity with PCIe, USB3, or Power Delivery

Required Experience:

  • Demonstrate an expert knowledge of System Verilog (SV) or similar verification language
  • Demonstrate an expert knowledge of Verilog for chip design and verification
  • Understanding the ASIC flow from MAS to silicon including RTL design, verification, synthesis, timing constraints, GLS, FPGA prototyping, first silicon bring up and debug
  • Experience with high-speed serial protocols (USB3, PCIe, Ethernet, etc.)
  • Experience with creating module level test benches and BFMs

ASIC Design Engineer

Annual base salary: $90,000 – $120,000

Responsibilities:

  • Member of design team for large SOCs

Qualifications:

  • BS/MS degree and 0-5 years of work experience
  • Good understanding of digital design and verification practices from course work or job experience
  • Ability to write Verilog RTL and basic knowledge or experience with simulations
  • Familiarity with high-speed protocols such as USB3 or PCIe is a desirable

Required Experience:

  • Demonstrate a basic knowledge of System Verilog (SV) or similar verification language
  • Demonstrate a basic knowledge of Verilog for chip design and verification
  • Experience with high-speed serial protocols (USB3, PCIe, Ethernet, etc.)
  • Relevant course work for VLSI/ASIC design

Taipei & Hsinchu

Sr./ Analog Design Engineer

Sr./ Logic Design Engineer


Nanjing

 Sr./ Analog Design Engineer 

Sr./ Layout Designer Engineer 

Sr./ Logic Design Engineer 

Sr./ Software Engineer

Sr./ System Engineer 


Shanghai

Sr./ Analog Design Engineer 

Sr./ FAE Engineer

Sr./ Layout Designer Engineer 

Sr./ Logic Design Engineer 

Sr./ Product Engineer

Sr./ Software Engineer

Sr./ System Validation Engineer

Sr./ System Engineer 

Sr./ Test Engineer 

 

For any questions or further information, contact hr@paradetech.com