JobOpportunities

Current Job Openings

Beaverton, Oregon / Taipei, Taiwan Jobs

For information, contact hr@paradetech.com

Position: Staff ASIC Design Engineer

Location: Beaverton, Oregon (USA) / Taipei, Taiwan

 Responsibilities:

  • SOC subsystem architect including documentation of micro-architecture
  • Lead design team for major subsystems of large SOCs

Required Experience:

  • BA/MS degree and 10+ years of relevant work experience
  • Expert understanding of digital design and verification practices
  • Ability to write RTL based on a specification and simulate vectors to verify RTL
  • Experience using System Verilog (SV) and at least two prior RTL designs
  • Extensive knowledge of PCIe, USB3, or Power Delivery

Qualifications:

  • Demonstrate an expert knowledge of System Verilog (SV) or similar verification language
  • Demonstrate an expert knowledge of Verilog for chip design and verification
  • Understanding the ASIC flow from MAS to silicon including RTL design, verification, synthesis, timing constraints, GLS, FPGA prototyping, and first silicon bring up and debug
  • Experience with high speed serial protocols (USB3, PCIe, Ethernet, etc.)
  • Experience with creating module level test benches and BFMs

Position: Sr. ASIC Design Engineer

Location: Beaverton, Oregon (USA) / Taipei, Taiwan

 Responsibilities:

  • Member of design team for large SOCs

Required Experience:

  • BA/MS degree and 5+ years of relevant work experience
  • Good understanding of digital design and verification practices
  • Ability to write RTL based on a specification and simulate vectors to verify RTL
  • Experience using System Verilog (SV) and at least one prior RTL designs
  • Familiarity with PCIe, USB3, or Power Delivery

Qualifications:

  • Demonstrate an expert knowledge of System Verilog (SV) or similar verification language
  • Demonstrate an expert knowledge of Verilog for chip design and verification
  • Understanding the ASIC flow from MAS to silicon including RTL design, verification, synthesis, timing constraints, GLS, FPGA prototyping, and first silicon bring up and debug
  • Experience with high speed serial protocols (USB3, PCIe, Ethernet, etc.)
  • Experience with creating module level test benches and BFMs

Cork Ireland Jobs

For information, contact hr@paradetech.com

Position: Analog Design Engineer

Company: Parade Technologies Ireland, Ltd.
Working Location: Cork, Ireland

Responsibilities

  • You will be part of the development team for specification and implementation of analog designs using the latest IC CAD tools and methodologies.
  • You will work in close conjunction with the digital and verification teams to develop a complete, world class mixed signal design environment.

Requirements

  • 3+ years experience in Analog Design
  • Excellent understanding of Analog Design fundamentals
  • Experience with Cadence Schematic Entry and Spice simulation is essential
  • Good level of knowledge of Analog layout techniques
  • Matlab modelling capability desirable
  • Working knowledge of Unix, Excel also required
  • It is essential that the candidates will have experience of planning, design, layout, tape-out and characterization of their analog circuits

Lynnwood Washington Jobs

For information, contact hr@paradetech.com

Position: Senior FIRMWARE Design Engineer

Location: Lynnwood, WA

DESCRIPTION OF POSITION –

  • Support development and maintenance of firmware products for discrete touch MCU’s and integrated touch and display controller devices.
  • Document, program, test, and debug C and ARM assembly language firmware
  • Document, program, test, and debug Python utility scripts and firmware build scripts
  • Learn projected capacitance touch sensing systems architectures, design details, and requirements
  • Work with local systems, software, test, and customer applications engineering and remote IC design engineering groups
  • Some travel required

QUALIFICATIONS –

  • Bachelor’s or Master’s degree or equivalent experience in Computer Science, Electrical Engineering, Computer Engineering, Mechanical Engineering, Physics, or Mathematics.
  • 0-3 years embedded microcontroller/MCU background.  ARM Cortex-M devices preferable.
  • Solid ‘C’ and Python skills with some assembly language familiarity.
  • Experience with embedded software programming and debugging, digital multimeters, oscilloscopes, and logic analyzers.
  • Knowledgeable of elementary analog and digital circuits.
  • Experience using I2C, SPI, or UART.
  • Object-oriented design approach.
  • Pays attention to detail.
  • Good problem solving skills.
  • Curious and willing to take initiative.
  • Able to work in both team and individual settings.
  • Willing to communicate with engineers of varied backgrounds: customer applications, software, digital IC, analog IC, and systems.
  • Fluent in English (both written and oral)

San Jose Jobs

For information, contact hr@paradetech.com
Send resume to:  Parade Technologies, Inc.  2720 Orchard Pkwy, San Jose, CA  95134

Current Job Openings:

Position: Sr./ Staff Analog Design Engineer

Location: San Jose, CA

Qualifications:

  • 5+ years’ of digital IC design experience with MS in EE degree
  • Over 10Ghz PLL and CDR design experience
  • Hands on silicon design and bring up experiences
  • Experiences in mixed signal SERDES design
  • Experiences with data communication protocols such as PCI Express, USB3.0/4.0, HDMI, DisplayPort, etc.
  • Design experience with FinFET technology is a plus
  • Good written and verbal communication skills to work in a team environment

Position: Sr./ Staff BJT Analog Design Engineer

Location: San Jose, CA

Qualifications:

  • 5+ years of analog or mix mode IC design experience with BS, MS or PHD in EE degree
  • Familiar with BJT circuit design
  • Familiar with EDA tool such as Virtuoso, hspice/spectre simulation and LPE extraction
  • Experience in these areas is preferred: BiCMOS, CMOS or SiGe high-speed (>10Gb/s) circuit, Linear electrical amplifier & equalizer, limiting amplifier, and CML/SST driver
  • Good written and verbal communication skills to work in a team environment

Position: Director/ Program Manager – Automotive Programs

Location: San Jose, CA

 Responsibilities:

  • Develop, set up and maintain TS16949 requirements for all internal and external sites engaged in Automotive products and related operations
  • Drive new automotive qualification schedules and activities
  • Assists all departments with development of Control Plans, Work Instructions in accordance with their PFMEAs, Process Flows, Company quality system’s procedures, customer requirements and automotive industry standards
  • Supports supplier quality system audits according to ISO/TS16949 requirements
  • Establish and oversee PPAP process for internal organizations and subcontract suppliers
  • Develop safety plans to ensure compliance with ISO26262
  • With Sales, negotiate with customer specific automotive quality requirements
  • Serve as Focal Point for major customer quality issues
  • Partner with Customer Quality and Operations departments to solve quality problems while maintaining product development and manufacturing efficiencies, meeting competitive business deadlines, and increasing customer satisfaction
  • Ensure effective containment of quality issues identified by customers.  Drive root cause analysis and permanent corrective actions

Required Experience:

  • 15+ years industrial experience in Quality Engineering/ Quality Management within the semiconductor industry
  • ISO/ TS16949 and ISO 26262 experience driving compliance and implementation of requirements
  • Automotive Industry experience in an electronics manufacturing environment
  • Hands on experience apply VDA and other automotive specific standards (e.g. IATF, ISO, SAE, JEDEC, ZVEI, etc.)
  • Experience as leader in corporate cross functional teams
  • Lean and Six Sigma experience a plus
  • Demonstrated ability to develop strong relationships with customers and internal, cross functional organizations

Qualifications:

  • Minimum of Bachelor’s degree in Engineering or related field, Master’s degree preferred
  • Strong written and verbal skills as well as organizational and program management capabilities
  • Excellent skills in Word, Excel and PowerPoint
  • Reading and speaking Chinese Mandarin are a plus
  • Ability to travel domestic and internationally

Position: Sr. / Staff Logic Design Engineer

Location: San Jose, CA

Qualifications:

  • 5+ years’ experience with BS in EE, CS or equivalent. MS a plus
  • Hands on silicon design and bring up experiences
  • Experiences with data communication protocols such as PCI Express, SuperSpeed USB, SATA, etc.
  • Experiences in mixed signal design with good understanding of analog circuit design
  • Design experience with PCIe 3.0 and 4.0 is a plus

Position: Logic Design Engineer

Location: San Jose, CA

 Responsibilities:

  • Design RTL/Logic using Verilog
  • Simulate and develop IPs and Subsystems
  • Validate silicon and debug

Qualifications:

  • BS/MS in EE or CS
  • 3+ years working experience in logic design
  • Good Communication skills
  • Experience with at least one product development cycle

Position: Senior High Speed Analog Design Engineer

Location: San Jose, CA

  • 5+ years experience with MS in EE or CS
  • Hands on experiences on the design and validation of wireline high speed silicon
  • Experiences with strong design capability for the 10Gbps+ wireline data transfer
  • Experience with USB 3.1, or PCIe 3.0 and PCIe 4.0 is a plus

Taipei Jobs

For information, contact hr@paradetech.com

Analog Design Engineer

Cost Manager

FAE Engineer

Jr. Accountant and Office Admin Support

Operations Manager

PC Control Manager

Production Control Engineer

Sr. Sales Manager


Nanjing Jobs

For information, contact hr.sh@paradetech.com

Analog Design Engineer

Jr. Accountant and Office Admin Support

Layout Designer Engineer

Logic Design Engineer

Product Engineer

Section Manager, Logic Design

Software Engineer

Sr. Analog Design Engineer

Sr. Layout Engineer

Sr. Product Engineer

Sr. Software Engineer

Sr. System Engineer

Sr. System Validation Engineer

System Engineer

System Validation Engineer


Shanghai Jobs

For information, contact hr.sh@paradetech.com

Accountant

Analog Design Engineer

FAE Engineer

Layout Designer Engineer

Logic Design Engineer

Marketing Engineer

Product Engineer

Software Engineer

System Validation Engineer

System Engineer

Test Engineer

Sr. Analog Design Engineer

Sr. CAD Engineer

Sr. Layout Engineer

Sr. Logic Design Engineer

Sr. Product Engineer

Sr. Staff Analog Design Engineer

Sr. Staff Layout Engineer

Sr. Staff Logic Design Engineer