Embedded DisplayPort to LVDS Converter

2 Lane eDP input, Dual Link LVDS Output

The PS8615 is an Embedded DisplayPort to LVDS converter designed for PC’s that utilize a GPU with an Embedded DisplayPort (eDP™) output and a display panel that accepts an LVDS input.


  • Ÿ Enables the use of LVDS display panels with DisplayPort or eDP™ video Source devices
  • Ÿ Supports up to 1920×1200@60Hz at 24-bit color depth
  • Ÿ No external crystal or timing reference needed with Parade’s CrystalFree™ technology
  • Ÿ Single 3.3V or 2.5V supply with low power consumption, less than 330mW at 1920×1200@60Hz, 24 bits per pixel
  • Ÿ Firmware-less operation, supports hardware pin configuration or initial code configuration
  • Ÿ Optional I2C slave interface for chip control
  • Ÿ ESD: HBM 8kV at connector pins
  • Ÿ 0°C to 70°C Operating Temperature Range
  • Ÿ 56-pin Halogen free QFN RoHS package

Ÿ DisplayPort Input

  • Compliant to VESA® DisplayPort Specification 1.1a
  • Compliant to VESA Embedded DisplayPort (eDP™) Specification 1.2 with AUX enabled backlight control
  • Supports 1-lane and 2-lane main link configurations
  • Link rates of 1.62 Gbps and 2.7Gbps
  • Supports full link training, fast link training, and no link training
  • Supports all eDP display authentication and GPU specific power management protocols

Ÿ LVDS Interface

  • Single link or dual link LVDS output, clock speed up to 135MHz
  • LVDS spread spectrum clocking of +/-0.5% and +/-1%
  • Supports LCD panel power sequence control

The PS8615 will appear as a DP or eDP Sink device to the video Source, and will serve as an LVDS Source device to the LVDS display panel. The device is a fully integrated solution requiring no external CPU, memory, clock reference or voltage regulator. The PS8615 can be configured to read EDID from the display DDC channel, or from an option external ROM attached to the PS8615 (I2C master provided).  The external ROM can also include configuration code to customize device operation and interface timing. The PS8615 provides display panel power-up sequencing and backlight control including PWM generation. Backlight characteristics can be controlled by the video Source over the DP AUX channel using the eDP v1.2 DPCD control registers. Alternately, the video Source can provide the backlight control signals to the PS8615 which will gate them for panel power up sequencing, or the Source can bypass the device and control the panel backlight directly.