DP687 – Low Power 2 Lane FHD eDP Tcon
eDP v1.2 LCD Timing Controller
The DP687 is an LCD timing controller (TCON) with a two-lane Embedded DisplayPort™ (eDP) Receiver to support LCD panels for mobile PC and embedded display PC platforms. This device supports the eDP v1.2 specification that includes display control features using the AUX channel including backlight control.
- DisplayPort™ Input
- Compliant to VESA® Embedded DisplayPort™ Standard 1.2
- Supports VESA DPCD version 1.2
- Supports 2-lane main link configuration and 2.7/1.62-Gbps data rate
- Supports full link training, fast link training and no link training
- Supports 18/24-bit RGB color format input
- Supports DisplayPort™ standard SSC 0.5% down spreading
- Content Protection
- Supports eDP authentication: Alternate Scramble Reset (ASSR)
- Panel Interface
- Supports all sized panels up to 2-lane DisplayPort™ bandwidth limit, including FHD (1920×1080) and WUXGA (1920×1200) 6/8-bit panels
- Supports 6P1D/4P2D SIPI/PDI P2P Interface
- Supports P2P COG interface up to 1.2Gbps
- Supports dynamic refresh rate (DRR), seamless Display Refresh Rate Switching (sDRRS) and nvDPS power saving modes
- Supports G-Sync and Free-Sync
- Supports SINK additional SSC clock on miniLVDS interface: center spreading of 0.25% to 2.0%
- TCON Interface
- Supports dual gate pixel structure
- Support special Z-Inversion pixel structure
- Video Processing
- CrystalFree technology – no external timing reference needed
- Stores LUT contents in EEPROM to support gamma correction and FRC
- Supports Color Engine
- Supports programmable BIST or Aging patterns
- Supports Pattern Detection
- Backlight Control
- Parade’s exclusive Smart-Backlight™1 feature for color and power optimization
- Integrated On-chip DC/DC switching regulator
- ESD
- HBM 8kV
- MM 300V
- CDM 2kV
- Package
- 60-pin 5×9 mm2 TQFN RoHS halogen free package
Applications
- Notebook LCD Panels
- Embedded LCD Panels