DP821 – 4 Lane HBR2 eDP 1.5 Panel Replay Tcon – Supports HDR WQXGA at 120Hz

DP821 is a low power LCD timing controller (Tcon) supporting WQXGA (2560×1600) up to 120Hz refresh rate; utilizing 4 lanes at the HBR2 (5.4 Gbps) link rate. DP821 provides full eDP 1.5 functionality including PSR2 with selective update, Early Transport, Panel Replay, AUX-Less ALPM and other advanced features.

KEY FEATURES

Embedded DisplayPort™ Input

  • Compliant to VESA Embedded DisplayPort™ Standard 1.5
  • Supports VESA DPCD version 1.4
  • Supports 1/2/4-lane main link configuration and HBR2/HBR/RBR data rate
  • Supports full link training, fast link training and no link training
  • Supports 18/24/30-bit RGB color format input

PSR (Panel Self Refresh)

  • Supports Panel Self Refresh Ver. 1 (PSR) introduced in eDP v1.3
  • Supports Panel Self Refresh with Selective Update (PSR2) introduced in eDP1.4a
  • Supports Panel Replay introduced in eDP1.5
  • Supports Single Frame Update

Refresh Rate Switching Mode

  • Supports Microsoft video playback mode
  • Supports VESA Adaptive Sync
  • Supports Intel Low Refresh Rate 2.5 (LRR2.5)
  • Supports AMD Free Sync 2
  • Supports Nvidia Direct Drive G-Sync

 Panel Interface

  • LCD panel up to 2560×1700@120Hz
  • Supports SIPITM point to point interface up to 6P/1D and 4P/2D configuration with QFN package, 6P/1D and 6P/2D configuration with BGA package, with up to 2.4 Gbps bit rate per lane
  • Supports SINK additional SSC clock on panel interface
  • Supports 6/8-bit color depth

Video Processing

  • Stores LUT contents in EEPROM to support gamma correction and FRC
  • Supports Color Engine
  • Supports programmable Aging patterns
  • Supports Pattern Detection
  • Crystal Free technology – no external timing reference needed

HDR

  • Supports automatic White point and Color tuning in assembly line
  • Supports HDR 400
  • Supports Intel eDP HDR AUX interface
  • Supports AMD Free Sync Premium Pro
  • Supports Nvidia HDR interface
  • Supports SDR to HDR enhancement

Backlight Control

  • Parade’s exclusive Smart-BacklightTM feature for color and power optimization

Control Interface

  • I2C master with 128Kb EEPROM for loading register initial values or expansion function
  • I2C slave for internal register control and pass through I2C access
  • SPI Master with 2Mb Flash Rom for loading firmware, register initial values, or Instant On Logo (eSOL)

Package: 68-pin 4.6x11mm2 QFN and 119-ball 4x9mm2 FBGA

APPLICATIONS

  • High resolution, high refresh rate LCD panels for HDR and gaming