DisplayPort™

DP501 DisplayPort™ & DVI™/HDMI™ Dual Mode Transmitter
(Product Brief)
The DisplayPort architecture and interface specification leverage matured technologies such as physical layer of PCI Express Bus, packet based transaction & quality of service of data communication, and advanced CMOS semiconductor process to address existing and future growth of digital display on PC & CE industries. The objective of DP501 DisplayPort transmitter product is to provide a scalable and interoperable digital display interface with optional content protection interface to address broad application in PC & CE devices.
The DP501 input port support versatile sources with various video and audio source formats from 3D graphics controllers, integrated north bridges and other multimedia content creation devices. The core engine of DP501 convert, packet, and serialize incoming media stream and output in either Displayport physical or TMDS signaling.

Key Features

  • Dual Output Modes: Direct drive DisplayPort Monitor, DVI Monitor, or DTV with HDMI input
  • Auto Monitor type Detection through I2C or DisplayPort AUX channel
  • Multiple Input Modes: SDR, DDR, ITU-R BT.656,
  • Multiple Input Formats: RGB 6/8/10/12 bpc; YCbCr 422/444, 8/10 bit per component
  • SPDIF Audio Input up to 8 channels, 192K Hz Sampling Rate
  • Support IEC-60958 L-PCM or IEC-61937 Encoded/Compressed Audio Data Formats
  • High Link Clock Rate: 2.7/1.62 Gbps in DisplayPort mode or up to 1.65 Gbps in DVI/HDMI mode
  • Compliance with DisplayPort Physical Electrical Specification up to 2.7 Gbps
  • Build Spread Spectrum on DisplayPort Physical Interface
  • Compliance with TMDS Electrical Specification up to UXGA Resolution at 1.65 Gbps
  • Support 4/2/1 lanes with Auto Lane Number Match and Link Clock Rate Configuration
  • Programmable Driver Current and Pre-emphasis up to 4 levels
  • Hot Plug/Unplug Detection through HPD pin
  • Half Duplex Bi-directional AUX Channel for Link Services
  • Secured Content Protection with HDCP on DVI/HDMI
  • Embedded or Discrete serial flash key ROM
  • 1.2V Core Power Supply, 3.3V I/O Power Supply, 100-pin TQFP RoHS Package
  • Low power consumption, 600mW typical power at DisplayPort high-rate 2.7 Gbps
  • Programmable on-chip spread-spectrum clock generation
  • 5V tolerance for HPD, I2C, & CA_DET#Control pins
  • 0ˇăC to 70ˇăC Operating Temperature Range
  • ESD Human Body Mode ˇÝ 4 kV, Compliant with JEDEC JESD22-A114-D standard
Applications
  • 3D Graphics Add-in Card
  • All-in-one PC Motherboard
  • External Digital Display for Notebook PC

  • Notebook Docking Station
  • Digital Set-Top-Box
  • High Definition Media Player

DP601 DisplayPort™ & DVI™/HDMI™ Dual Mode Receiver
(Product Brief)
The DisplayPort architecture and interface specification leverage matured technologies such as physical layer of PCI Express Bus standard, packet based transaction & quality of service of data communication, and advanced CMOS semiconductor process to address existing and future growth of digital display on PC & CE industries. The objective of DisplayPort & HDMI/DVI dual-mode receiver product is to provide a scalable and interoperable digital display interface with optional content protection interface to address broad application in both PC & CE display devices.
The dual-mode receiver input port support versatile sources with various video and audio source formats from DisplayPort, HDMI, or DVI transmitter devices. The core engine of receiver products converts, unpackets, and de-serializes incoming media stream and output in either LVDS or DVO signaling format.

Key Features

  • Direct Interface to DisplayPort or HDMI/DVI Transmitter Devices
  • Dual Channel LVDS Outputs, Support 18/24/30/18+18/24+24/30+30-bit LCD panels
  • Support up to QHD (3840x2160), QWXGA (2560x1600) Hi-Def & Hi-Res LCD panels
  • Digital Video Output (DVO) in 18/24/30/36-bit format with separate sync control
  • Multiple Pixel Formats: RGB 6/8/10/12 bit per component (bpc); YCbCr 422/444, 8/10/12 bpc
  • Compliance with DisplayPort Specification 1.1 at 1.62/2.7 Gbps data rate
  • Compliance with DVI 1.0 up to 1.65 Gbps and HDMI 1.3a up to 2.25 Gbps
  • Auto Loss of Signal Detection for Link Management
  • High Input Sensitivity, with Differential Input Level down to 100 mV
  • Adaptive Receiver Equalization up to 18 dB
  • Robust Clock Data Recovery without External Reference Clock
  • Superior Jitter Tolerance up to 0.8 UI
  • Support DisplayPort Spread Spectrum Clocking to reduce EMI
  • Source device Hot Plug/Unplug Detection through DisplayPort AUX CH DC level input pins
  • Secured Content Protection with HDCP 1.3, Embedded Serial Key ROM
  • Support HDCP Repeater for Down Stream Devices
  • Support Display Power Management
  • Convert analog Light Sensor input into Pulse Width Modulation Output for Backlight Control
  • Programmable digital PWM (Pulse Width Modulation) for Backlight Control
  • Integrated Optional Microcontroller for System level Management
  • Build-in Bridge between DisplayPort AUX channel & E-DDC for E-EDID Data Structure
  • Adjustable Contrast, Brightness, Saturation, Hue, & Color Boost
  • I2S, SPDIF, & One-bit Audio Outputs
  • Support LPCM, AC-3, & DTS, & One-bit Audio (DSD & SACD) Audio formats
  • 1.2V Core Power Supply & 3.3V I/O Power Supply
  • 128-pin LQFP 14x20 mm^2 RoHS Package
  • 5V tolerance for HPD, I2C, & AUX Channel pins
  • 0ˇăC to 70ˇăC Operating Temperature Range
Applications
  • LCD Monitor
  • A/V Receiver
  • Digital TV
  • Multi Functional Monitor
DP621 LCD Timing Controller With DisplayPort™ Receiver
(Product Brief)
The DisplayPort display interface specification leverages matured technologies such as physical layer of PCI Express, packet based transaction and quality of service of data communication, and advanced CMOS semiconductor process to address existing and future growth of digital display on PC and consumer electronics applications. DP621, an LCD Timing controller with DisplayPort Receiver, provides a scalable and interoperable digital display interface together with a programmable timing control scheme to address broad applications on PC and embedded display devices.

Key Features

  • DisplayPort Receiver compliant with DisplayPort Specification 1.1a for both 1.62 and 2.7 Gbps
  • Very low power consumption, 255mW to 430mW to support up to WUXGA
  • No crystal or external reference clock needed with CrystalFree technology
  • Built-in adaptive equalization to support 2.7 Gbps transmission over minimal 15m AWG28 cable without requesting transmitter pre-emphasis
  • Excellent ESD performances; HBM 8kV at connector pins and 5kV all other pins
  • Support DisplayPort 1 or 2 lanes operation
  • Support additional Spread Spectrum Clocking on DisplayPort Receiver, RSDS/mini-LVDS transmitter to reduce EMI
  • Support 18/24-bit RGB color format
  • HDCP 1.3 for Content Protection, Integrated HDCP key ROM
  • On-chip microprocessor with SPI ROM interface
  • Support various LCD panels including WUXGA (1920x1200), UXGA (1600x1200), WSXGA+ (1680x1050), SXGA+ (1440x1050), SXGA (1280x1024), WXGA+ (1440x900) and WXGA (1280x800, or 1360x768, or 1280x768)
  • Support reduced blanking, reduced refresh rate and dynamic refresh rate timing mode
  • Programmable TCON control signals generation and programmable FRC patterns
  • 6-bit, single RSDS or dual RSDS output, maximum clock rate of 90MHz (for WUXGA)
  • 6 or 8-bit, dual mini-LVDS output, maximum clock rate of 162MHz (for WUXGA)
  • Support asymmetrical configuration with 3:4 left-right ratio in the number of column drivers by selecting output clock frequency from the video clock frequency of 5, 10, 15, 25%
  • Support main link and RSDS/mini-LVDS pin swapping for top or bottom mounting PCBs
  • LCD power sequence control
  • Support fail-safe mode by scaling to VGA (640x480, 60Hz)
  • Support programmable video pattern generation
  • Light sensor input and programmable Pulse-Width-Modulation backlight control output
  • Low bandwidth ADC for up to 16-button inputs
  • Slave I2C interface for chip control
  • I2C masters for expansion function
  • 100-pin TQFP RoHS Package
Applications
  • Direct Drive LCD Monitor
  • Notebook LCD panels
  • Embedded LCD panels
DP603 Displayport LCD Timing Controller For Embedded Systems
(Product Brief)
The DisplayPort display interface specification leverages matured technologies such as physical layer of PCI Express, packet based transaction and quality of service of data communication, and advanced CMOS semiconductor process to address existing and future growth of digital display on PC and consumer electronics applications. DP603, an LCD Timing controller with DisplayPort Receiver, provides a scalable and interoperable digital display interface together with a programmable timing control scheme to address the embedded display applications.

Key Features

  • DisplayPort 1.1a compliant receiver, supporting 1 or 2 lanes width, and 2.7Gbps or 1.62Gbps link rate.
  • Low power consumption, 236mW for WXGA+ (1440x900)
  • No crystal or external reference clock needed with CrystalFree technology
  • Adaptive or programmable equalization to remove any DisplayPort TX pre-emphasis request to lower system power
  • Support reduced RSDS/min-LVDS swing to save power
  • Support no hand shaking DisplayPort connection
  • High receiving sensitivity allowing DP TX 200mVpp swing to minimize system power
  • Excellent ESD performances; HBM 5kV
  • Support additional Spread Spectrum Clocking on DisplayPort Receiver, RSDS/mini-LVDS transmitter to reduce EMI
  • Support 18/24-bit RGB color format
  • On-chip microprocessor with SPI ROM interface
  • Support various LCD panels including WUXGA (1920x1200), UXGA (1600x1200), WSXGA+ (1680x1050), SXGA+ (1440x1050), SXGA (1280x1024), WXGA+ (1440x900) and WXGA (1280x800, or 1360x768, or 1280x768)
  • Support reduced blanking, reduced refresh rate and dynamic refresh rate timing mode
  • Programmable TCON control signals generation and programmable FRC patterns
  • 6-bit, single RSDS or dual RSDS output
  • 6 or 8-bit, dual mini-LVDS output
  • Support asymmetrical configuration with 3:4 left-right ratio in the number of column drivers
  • Support main link and RSDS/mini-LVDS pin swapping for top or bottom mounting PCBs
  • LCD power sequence control
  • Support programmable video pattern generation
  • Light sensor input and programmable Pulse-Width-Modulation backlight control output
  • Slave I2C interface for chip control
  • I2C masters for expansion function
  • 100-pin TQFP RoHS Package
Applications
  • Direct Drive LCD Monitor
  • Notebook LCD panels
  • Embedded LCD panels
DP606 eDP™ TCON
(Product Brief)
The DP606 is an LCD timing controller (TCON) with a one-lane Embedded DisplayPort (eDPTM) Receiver to support LCD panels for mobile PC and embedded display PC platforms. Both RSDS and mini-LVDS signal formats are supported at the output interface (user selectable). The DP606 consumers very low power and integrates all the necessary functions for a mobile or embedded TCON.

Key Features

  • DisplayPort™ Receiver compliant to DisplayPort Specification 1.1a
  • 180mW typical power consumption (at 1440x900 resolution)
  • Supports one DisplayPort Main Link lane at 2.7Gbps and 1.62Gbs
  • CrystalFree technology ¨C no external timing reference needed
  • ˇ°Instant Onˇ± technology supports eDP with no link training
  • Advanced equalizer in DP receiver compensates for cable and PCB losses, no need to adjust TX driver strength and pre-emphasis levels
  • High receiver sensitivity allows reduced DP TX output swing to minimize system power
  • Supports advanced dynamic refresh rate timing for power saving
  • Supports reduced RSDS/min-LVDS output swing to save power
  • Accepts Spread Spectrum Clocked eDP from Source
  • Additional Spread Spectrum Clocking can be applied to LCD interface
  • Integrated TCON with programmable TCON control signal generation
  • Supports reduced blanking timing and reduced refresh rate
  • Selectable RSDS output interface mode with programmable drive strength, maximum clock rate of 120MHz
  • Selectable mini-LVDS output interface mode with programmable drive strength, maximum clock rate of 180MHz
  • Main link and RSDS/ mini-LVDS pin swapping for top or bottom mounting configurations
  • LCD power sequence control
  • Light sensor input and pulse-width-modulation back light control output
  • I2C slave interface for optional device control
  • I2C master interface for EDID ROM
  • Hardware driven power management supports various power states
  • ESD HBM 5kV
  • 64-pin QFN RoHS package
Applications
  • Notebook LCD panels
  • Embedded LCD panels
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